International Reliability Physics Symposium

40th Annual • April 7 – 11, 2002 • Hyatt Regency Dallas • Dallas, Texas

IRPS Technical Program Chair Home Page

Technical Program Chair Contact Information: Bernie Pietrucha, Rowan University, Electrical & Computer Engineering Department
201 Mullica Hill Road, Glassboro, NJ 08028 USA
Telephone: +1-(856)-256-5338 ; Facsimile: +1-(856)-256-5241
e-mail: pietrucha@rowan.edu or bpietrucha@worldnet.att.net

For Paper Submissions: Bernie_Pietrucha@irps.org

Author Kit

2002 IRPS Call for Papers and Call for Posters pdf (Submission deadlines passed)
Bernie discussed new features of the 2002 call at 2001 IRPS closing.)

Electronic Abstract Submissions
IRPS prefers electronic submission of abstracts. Authors wishing to submit an abstract electronically must follow certain guidelines. Please read the guidelines before submitting an abstract.

Late Papers: A limited number of excellent late papers reflecting important breakthrough developments can be considered on a space-available basis. Abstract and summary must be received no later than December 1, 2001 to be considered.

The IRPS Technical Program committee is composed of experts in the field of reliability engineering and physics from industry, academia and government labs. The Program Committee is divided into sub-committees that review papers in specific submission categories. This year the sub-committees are:

Dielectrics co-chair: Muhamad Alam, Agere
co-chair: Eric Vogel, NIST

Hot Carriers co-chair: Guisepe La Rosa, IBM
co-chair: Janet Wang, Transmeta

MEMS co-chair: Danelle Tanner, Sandia
co-chair: Mike Douglass, TI

Device & Process co-chair: Prasad Chaparala, National
co-chair: Srikanth Krishnan, TI

Assembly/ Packaging co-chair: Tom Moore, Omniprobe, Inc.
co-chair: S. Sidharth, AMD

NVM co-chair: Fred Kuper, Philips
co-chair: Neal Mielke. Intel

ESD/Latchup co-chair: Jeremy Smith, TI
co-chair: Steven Beebe, AMD

Interconnects co-chair: Mike Dion, Intersil,
co-chair: James Walls, Motorola

Process Induced Damage co-chair: Tomasz Brozek, PDF
co-chair: (Charles) Kin P. Cheung, Rutgers University

Failure Analysis co-chair: Travis Eiles , Intel
co-chair: Mike Bruce , AMD

Product Reliability co-chair: Bob Knoell, Visteon
co-chair: Walter Riordan , Intel,

Compound Semiconductor co-chair: Wally Anderson, NRL,
co-chair: Anthony Immorlica, Lockheed-Sanders

Technical Program Committee Members Home Page (password protected)

Dielectrics	co-chair: Muhamad Alam, Agere co-chair: Eric Vogel, NIST
Hot Carriers	co-chair: Guisepe La Rosa, IBM co-chair: Janet Wang, Transmeta
MEMS	co-chair: Danelle Tanner, Sandia co-chair: Mike Douglass, TI
Device & Process	co-chair: Prasad Chaparala, National co-chair: Srikanth Krishnan, TI
Assembly/ Packaging	co-chair: Tom Moore, Omniprobe, Inc. co-chair: S. Sidharth, AMD
NVM	co-chair: Fred Kuper, Philips co-chair: Neal Mielke. Intel
ESD/Latchup	co-chair: Jeremy Smith, TI co-chair: Steven Beebe, AMD
Interconnects	co-chair: Mike Dion, Intersil, co-chair: James Walls, Motorola
Process Induced Damage	co-chair: Tomasz Brozek, PDF co-chair: (Charles) Kin P. Cheung, Rutgers University
Failure Analysis	co-chair: Travis Eiles , Intel co-chair: Mike Bruce , AMD
Product Reliability	co-chair: Bob Knoell, Visteon co-chair: Walter Riordan , Intel,
Compound Semiconductor	co-chair: Wally Anderson, NRL, co-chair: Anthony Immorlica, Lockheed-Sanders